The invention relates to an ESD protection system, and particularly to an ESD protection system for protecting an X-ray flat panel detector. Further, the invention relates to an X-ray flat panel detector with an ESD protection system.
Presently, there are two types of X-ray flat panel detectors in the market: one is of an indirect energy conversion type, and the other is of a direct energy conversion type. Due to its advantages such as high conversion efficiency, wide dynamic range, high spatial resolution, and enhanced environmental adaptability, the indirect energy conversion type of X-ray flat panel detector has become the most popular detector in the X-ray flat panel detector market.
As shown in FIG. 1, the indirect energy conversion type of X-ray flat panel detector, hereinafter referred to as an X-ray flat panel detector, includes multiple scan lines 2, hereinafter referred to as gate lines, and multiple data lines 3 which are formed on a substrate (not shown). Scan lines 2 and data lines 3 are arranged in an intersecting manner to form multiple pixel regions. A pixel unit 4 is provided in each of pixel regions. A flicker layer or a phosphor layer (not shown) is formed on the substrate and covering the pixel region. Each pixel unit 4 includes a photodiode 5 and a pixel switch 6 having a terminal thereof connected to photodiode 5. The photodiode 5 is adapted to convert visible light into electrical charges. Photodiode 5 is generally formed of amorphous silicon, because amorphous silicon and its alloy, such as amorphous silicon doped with germanium, have high photo-electric conversion function in the wavelength of visible light, has better anti-radiation performance for radiation with high energy, and can be fabricated in large scale. Pixel switch 6 is adapted to control pixel unit 4 to be switched on or off. Pixel switch 6 may be an amorphous silicon thin film transistor or a diode. Pixel switches 6 in each row of pixel units 4 are connected to the same data line 3. Pixel switches 6 in each column of pixel units 4 are connected to the same corresponding scan line 2. The data lines 3 are connected to a data processing unit 7, hereinafter referred to as a readout unit, and scan lines 2 are connected to an address control unit 8, hereinafter referred to as a gate drive unit.
The working principle of the above X-ray flat panel detector is as follows. An X-ray generates the visible light after passing through the flicker layer or the phosphor layer. The visible light is converted into charges by photodiode 5 of pixel unit 4. The charges are stored in photodiode 5. Address control unit 8 applies a line-by-line voltage on scan lines 2 in the pixel array 1, so that pixel switches 6 are switched on line-by-line. The charges stored in photodiode 5 are then output to data processing unit 7 via data lines 3. Data processing unit 7 further performs processes, such as an enlargement and an analogy to digital conversion, on the obtained electrical signal, and thus image information is obtained.
Because the thin films in the photodiode and the TFT (i.e., the pixel switch) in the X-ray flat panel detector are extensive and have large area, electro-static discharge (ESD) is prone to occur during the process of designing, fabricating, assembling and testing of the X-ray flat panel detector. Nearly all of the microelectronic circuits will be very sensitive to the ESD, and thus electro-static protection should be provided for the X-ray flat panel detector, for improving its yield and reducing its production cost.
The ESD protection system of existing X-ray flat panel detectors includes a shorting bus and a metal-insulator-metal diode (MIM diode). However, these ESD protection systems have many problems, such as incompatibility with the testing and maintaining requirements of X-ray flat panel detectors.
To solve the above problems, as shown in FIG. 1, an ESD protection system for providing an ESD protection for an X-ray flat panel detector is disclosed in a US patent publication No. US2006/0092591A1 published on May 4, 2006 and titled “On-Substrate ESD Protection For Array Based Image Sensors”. As shown in FIG. 2, the ESD protection system includes an ESD leakage bus 10 formed on a substrate (not shown) and an ESD protection circuit 11 formed on the substrate, where the ESD leakage bus may be grounded. ESD protection circuit 11 has a first wiring terminal 12 connected to ESD leakage bus 10 and a second wiring terminal 13 connected to scan line 2 of the X-ray flat panel detector.
FIG. 3 is a schematic diagram of an equivalent circuit of the ESD protection system depicted in FIG. 2. ESD protection circuit 11 includes a pair of amorphous silicon thin film transistors, i.e., a first amorphous silicon thin film transistor 15 and a second amorphous silicon thin film transistor 16, connected in a back-to-back manner. When ESD occurs on scan line 2 of the X-ray flat panel detector, when the voltage between first wiring terminal 12 and second wiring terminal 13 of the ESD protection circuit is two times larger than the threshold voltage of the thin film transistors, then first amorphous silicon thin film transistor 15 and second amorphous silicon thin film transistor 16 will be switched on, ensuring that the ESD can flow from the scan line 2 into ESD leakage bus 10 in a short time, and thus prevent a part of the detector from being broken-down by the ESD voltage or prevent a generation of a TFT threshold voltage drift or other damages.
FIG. 4 is a sectional view of the first amorphous silicon thin film transistor in the above ESD protection circuit. First amorphous silicon thin film transistor 15 is formed on the substrate 17. Transistor 15 includes a gate 18, an active layer 19 located above gate 18, and a source 20 and a drain 21 are located above active layer 19. Active layer 19 includes an amorphous silicon (a-Si) layer 19a and a N+ amorphous silicon layer 19b located above a-Si layer 19a. As shown in FIG. 3, in ESD protection circuit 11, second amorphous silicon thin film transistor 16 has the same structure as that of first amorphous silicon thin film transistor 15.
As shown in FIG. 3 and FIG. 4, it can be seen from the working principles of the X-ray flat panel detector that in the normal use of the X-ray flat panel detector, the X-ray will irradiate the flicker layer or the phosphor layer above the pixel unit, and then be converted into visible light by the flicker layer or the phosphor layer. Because the pixel unit and the ESD protection circuit of the X-ray flat panel detector are formed on the same substrate, the visible light will radiate the ESD protection circuit while radiating the pixel unit. Therefore, first amorphous silicon thin film transistor 15 and second amorphous silicon thin film transistor 16 in the ESD protection circuit will also be exposed to a visible light 22. However, because the channels of first amorphous silicon thin film transistor 15 and second amorphous silicon thin film transistor 16 include amorphous silicon which can convert the visible light into charges, large photocurrent will occur in the ESD protection circuit during the working process of the X-ray flat panel detector.
Since the ESD protection circuit is connected to the scan line of the X-ray flat panel detector, the photocurrent will affect the voltage on the scan line, so that an actual voltage value on the scan line will be deviated from an ideal voltage value. This deviation in scan line voltage will result in the fluctuation of the finally obtained electronic image, e.g. horizontal and vertical stripes will occur in the image, and an increased noise level. In order to make the voltage on the scan line meet the requirements, the voltage on the scan line may be corrected or compensated by an external circuit of the X-ray flat panel detector, which will cause a waste of driving power consumption.
Further, if the pixel switch of the pixel unit is formed by an amorphous silicon thin film transistor, then the amorphous silicon thin film transistor of the ESD protection circuit and the amorphous silicon thin film transistor of the pixel unit may be formed in the same fabricating step, and thus the two thin film transistors have the same threshold voltage. In order to reduce the driving power consumption of the thin film transistor of the pixel unit, and to ensure that the thin film transistor of the ESD protection circuit may be switched on under a relatively low ESD voltage, the thin film transistor of the ESD protection circuit and the thin film transistor of the pixel unit generally have a threshold voltage between 1V and 3V. However, when the X-ray flat panel detector is driven to work normally, the voltage applied on the scan line is normally between −10V and +25V. Because the ESD protection circuit is connected to the scan line of the X-ray flat panel detector, the voltage applied on the thin film transistor of the ESD protection circuit is also between −10V and +25V. Then, a large leakage current will occur in the ESD protection circuit, no matter if the voltage applied on the scan line is a positive voltage or a negative voltage, which will result in a large leakage current on the scan line and cause a great waste of driving power consumption.
Therefore, in the X-ray flat panel detector with the above common ESD protection system, there is a need to maintain a small threshold voltage in the ESD protection circuit while reducing a great waste of driving power consumption in the X-ray flat panel detector.